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Configuration 2:1 SPDT Number of channels 3 Power supply voltage - single (V) 5, 12, 16, 20 Power supply voltage - dual (V) +/-10, +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 125 CON (typ) (pF) 9 ON-state leakage current (max) (µA) 1 Supply current (typ) (µA) 0.04 Bandwidth (MHz) 30 Operating temperature range (°C) -40 to 125 Features Break-before-make Input/output continuous current (max) (mA) 10 Rating Automotive Drain supply voltage (max) (V) 20 Supply voltage (max) (V) 20 Negative rail supply voltage (max) (V) 0
Configuration 2:1 SPDT Number of channels 3 Power supply voltage - single (V) 5, 12, 16, 20 Power supply voltage - dual (V) +/-10, +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 125 CON (typ) (pF) 9 ON-state leakage current (max) (µA) 1 Supply current (typ) (µA) 0.04 Bandwidth (MHz) 30 Operating temperature range (°C) -40 to 125 Features Break-before-make Input/output continuous current (max) (mA) 10 Rating Automotive Drain supply voltage (max) (V) 20 Supply voltage (max) (V) 20 Negative rail supply voltage (max) (V) 0
SOIC (D) 16 59.4 mm² 9.9 x 6
  • AEC-Q100 qualified for automotive applications:
    • Temperature grade 1: –45°C to +125°C, TA
  • Wide range of digital and analog signal levels:
    • Digital: 3V to 20V
    • Analog: ≤ 20VP-P
  • Low ON resistance, 125Ω (typical) over 15VP-P signal input range for VDD – VEE = 18V
  • High OFF resistance, channel leakage of ±100pA (typical) at VDD – VEE = 18V
  • Logic-level conversion for digital addressing signals of 3V to 20V (VDD – VSS = 3V to 20V) to switch analog signals to 20VP-P (VDD – VEE = 20V) matched switch characteristics, rON = 5Ω (typical) for VDD – VEE = 15V very low quiescent power dissipation under all digital-control input and supply conditions, 0.2µW (typical) at VDD – VSS = VDD – VEE = 10V
  • Binary address decoding on chip
  • 5V, 10V, and 15V parametric ratings
  • 100% tested for quiescent current at 20V
  • Maximum input current of 1µA at 18V over full package temperature range, 100nA at 18V and 25°C
  • Break-before-make switching eliminates channel overlap
  • Pin compatible with Industry Standard 4053 Multiplexers
  • AEC-Q100 qualified for automotive applications:
    • Temperature grade 1: –45°C to +125°C, TA
  • Wide range of digital and analog signal levels:
    • Digital: 3V to 20V
    • Analog: ≤ 20VP-P
  • Low ON resistance, 125Ω (typical) over 15VP-P signal input range for VDD – VEE = 18V
  • High OFF resistance, channel leakage of ±100pA (typical) at VDD – VEE = 18V
  • Logic-level conversion for digital addressing signals of 3V to 20V (VDD – VSS = 3V to 20V) to switch analog signals to 20VP-P (VDD – VEE = 20V) matched switch characteristics, rON = 5Ω (typical) for VDD – VEE = 15V very low quiescent power dissipation under all digital-control input and supply conditions, 0.2µW (typical) at VDD – VSS = VDD – VEE = 10V
  • Binary address decoding on chip
  • 5V, 10V, and 15V parametric ratings
  • 100% tested for quiescent current at 20V
  • Maximum input current of 1µA at 18V over full package temperature range, 100nA at 18V and 25°C
  • Break-before-make switching eliminates channel overlap
  • Pin compatible with Industry Standard 4053 Multiplexers

The CD4053B-Q1 analog multiplexers and demultiplexers are digitally-controlled analog switches having low ON impedance and very low OFF leakage current. These multiplexer circuits dissipate extremely low quiescent power over the full VDD – VSS and VDD – VEE supply-voltage ranges, independent of the logic state of the control signals.

The CD4053B-Q1 analog multiplexers and demultiplexers are digitally-controlled analog switches having low ON impedance and very low OFF leakage current. These multiplexer circuits dissipate extremely low quiescent power over the full VDD – VSS and VDD – VEE supply-voltage ranges, independent of the logic state of the control signals.

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* Data sheet CD4053B-Q1 Automotive CMOS Single 8-Channel Analog Multiplexer or Demultiplexer with Logic-Level Conversion datasheet PDF | HTML 04 Mar 2025

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