//Begin xWR6x43 Init sequence
TRST ABSENT;
FREQUENCY 1E6 HZ;
STATE RESET;
STATE IDLE;
ENDIR IDLE;
ENDDR IDLE;

// Device ID read 
// Normal bit order with compare
		SIR 4 TDI (D);
		SDR 32 TDI (00000000) TDO (2bb6802f) SMASK (FFFFFFFF);

//Section 1
		SIR 4 TDI (9) SMASK (F);
		SDR 32 TDI (00000089) SMASK (FFFFFFFF);

		SIR 4 TDI (C) SMASK (F);
		SDR 32 TDI (C1200100) SMASK (FFFFFFFF);

		SIR 4 TDI (E) SMASK (F);
		SDR 35 TDI (000000000) SMASK (7FFFFFFFF);

		SIR 4 TDI (A) SMASK (F);
		SDR 35 TDI (080000102) SMASK (7FFFFFFFF);

		SIR 4 TDI (A) SMASK (F);
		SDR 35 TDI (030000004) SMASK (7FFFFFFFF);

		SIR 4 TDI (B) SMASK (F);
		SDR 35 TDI (200000010) SMASK (7FFFFFFFF);

//Section 1a
		SIR 4 TDI (B) SMASK (F);
		SDR 35 TDI (7ffff0842) SMASK (7FFFFFFFF);
		SIR 4 TDI (B) SMASK (F);
		SDR 35 TDI (568000006) SMASK (7FFFFFFFF);

		SIR 4 TDI (B) SMASK (F);
		SDR 35 TDI (7ffff0b42) SMASK (7FFFFFFFF);
		SIR 4 TDI (B) SMASK (F);
		SDR 35 TDI (00000000e) SMASK (7FFFFFFFF);

		SIR 4 TDI (B) SMASK (F);
		SDR 35 TDI (7ffff5fc2) SMASK (7FFFFFFFF);
		SIR 4 TDI (B) SMASK (F);
		SDR 35 TDI (41f38589e) SMASK (7FFFFFFFF);

		SIR 4 TDI (B) SMASK (F);
		SDR 35 TDI (7ffff5fe2) SMASK (7FFFFFFFF);
		SIR 4 TDI (B) SMASK (F);
		SDR 35 TDI (4ad278f06) SMASK (7FFFFFFFF);

		SIR 4 TDI (B) SMASK (F);
		SDR 35 TDI (7ffff5fa2) SMASK (7FFFFFFFF);
		SIR 4 TDI (B) SMASK (F);
		SDR 35 TDI (00038003e) SMASK (7FFFFFFFF);

// Section 2
		SIR 12 TDI (088) SMASK (FFF);
		SDR 9 TDI (0A5) SMASK (1FF);

		SIR 12 TDI (0F3) SMASK (FFF);
		SDR 17 TDI (00005) SMASK (1FFFF);

		SIR 12 TDI (0F2) SMASK (FFF);
		SDR 151 TDI (00000000000000000000000000007800000000) SMASK (7FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF);

		SIR 12 TDI (0F1) SMASK (FFF);
		SDR 121 TDI (000000000000000000183060C183060) SMASK (1FFFFFFFFFFFFFFFFFFFFFFFFFFFFFF);

		SIR 12 TDI (0F0) SMASK (FFF);
		SDR 151 TDI (00000000000000005002801400A00500280140) SMASK (7FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF);

//End xWR6x43 Init sequence

